The present invention relates generally to a semiconductor device and an anodization process for the same, and more particularly to an anodization process for imparting porosity to semiconductor devices at desired sites.
Anodization of silicon substrates has conventionally been practiced in micro-machining of silicon. An example of the conventional anodization process will now be described.
FIG. 5 shows a silicon substrate to be employed in a semiconductor device or acceleration sensor. In this drawing, a p-type silicon layer 3 is formed on the front side of a plane-oriented (110) p-type single crystal silicon substrate (hereinafter referred simply to as silicon substrate) 2 over a predetermined area. The p-type silicon layer 3 has a higher silicon concentration than the silicon substrate 2, and an epitaxial growth layer 4 of n-type single crystal silicon is formed over the upper surface of the silicon substrate 2. The p-type silicon layer 3 is buried under the epitaxial growth layer 4. A p-type silicon layer 5 for forming an opening 15 is defined in the epitaxial growth layer 4, and the layer 5 extends from the surface of the epitaxial growth layer 4 to the p-type silicon layer 3. On the epitaxial growth layer 4 excluding the area where the p-type silicon layer 5 is formed, an oxide (SiO2) film 6 as a layer insulating film, a wiring pattern 7 such as of aluminum, a SiN or Si3N4 passivation film 8 for insulating the surface layer, and a resin protecting film 9 such as of photoresist having HF resistance are formed.
As shown in FIG. 6, the silicon substrate 2 is immersed together with the layers 3 to 9 in an aqueous HF solution (aqueous hydrofluoric solution) 10, and a counter electrode 11 which is a noble metal plate such as of Pt is disposed opposing the silicon substrate 2. An anode of a DC power source V is connected to the silicon substrate 2, and its cathode is connected to the counter substrate 11. Anodization is carried out by application of an electric field between the substrate 2 and the counter electrode 11. The p-type silicon layers 3 and 5 are converted to porous silicon layers, and the porous portions thus formed are removed by alkali etching in a later step to form a cavity. The epitaxial growth layer (n-type single crystal silicon) 4 present above the cavity constitutes a hollow beam and also assumes the structure of an acceleration sensor.
However, there are problems in that currents from the DC power source V in the anodization treatment diffuse to areas which need not be anodized, as indicated by the arrows in FIG. 5. This diffusion of electric currents (reactive currents) causes a voltage drop, which lowers the anodization rate in the areas to be anodized and the ranges to be subjected to porosity imparting treatment spread to the silicon substrate 2 side beyond the desired areas (i.e., p-type silicon layers 3 and 5). Accordingly, a cavity is formed beyond the desired area by the alkali etching in the later step.
It is an objective of the present invention to provide a process for anodizing a silicon substrate which can efficiently impart porosity selectively to the silicon substrate.
In order to attain the above objective, in the anodization process according to the present invention, the semiconductor device has a p-type single crystal silicon substrate. A first p-type silicon layer is formed on a first side of the p-type single crystal silicon substrate over a predetermined area. An n-type silicon layer is formed on the first side of the p-type single crystal silicon substrate. The first p-type silicon layer is a buried layer located under the n-type silicon layer. A second p-type silicon layer is defined in the n-type silicon layer so as to form an opening. A protecting film is formed on the n-type silicon layer with the surface of the second p-type silicon layer being exposed. An insulating film is formed on a second side, other side (the side opposite to the first side) of the p-type single crystal silicon substrate. An electrode layer which is formed under the insulating film has a connecting section at a portion aligned with the first p-type silicon layer and is connected electrically via the connecting section to the p-type single crystal silicon substrate. The anodization process includes the step of connecting a positive terminal of a DC power source to the electrode layer and also connecting its negative terminal to a counter electrode disposed to oppose the p-type single crystal silicon substrate and the step of applying a voltage between the electrode layer and the counter electrode so as to impart porosity to the first and second p-type silicon layers.
In the present invention, since the electrode layer is brought into contact with the p-type single crystal silicon substrate via the connecting section at least at the portion aligned with the buried p-type silicon layer, electric currents concentrate, when anodization is carried out, in the p-type silicon layer zone. Meanwhile, reactive currents diffusing to portions which are not to be anodized are inhibited. Thus, porosity is imparted selectively to the desired portions (selective porosity imparting treatment).